1. Field of the Invention
The present invention relates to an output voltage error compensator for detecting and minimizing an output voltage error. More specifically, the present invention is directed to an apparatus for and a method of detecting and minimizing an output voltage error of an inverter output voltage during a short-circuit prevention period of the inverter.
2. Description of the Background Art
FIG. 10 is a block diagram illustrating a control circuit for use in a conventional inverter output voltage error compensator as shown in, for example, Japanese Patent Publication No. 7071/1991. In this figure, an inverter main circuit 1, which is composed of transistors connected in a bridge-configuration, as is well known in the art, changes input direct current (DC) power from a DC power supply 4 into output alternating current (AC) power. The transistors of the main circuit 1 are partitioned into two groups, referred to hereinafter as upper and lower arm transistors, used to output respective portions of the AC power. The output of the main circuit 1 is received by an AC filter composed of inductor 2 and capacitor 3, and then transferred to load 5. A current detector 6 is connected in series with the AC filter, and delivers an indication of the output current of the main circuit 1 to a comparator circuit 11.
The comparator circuit 11 operates as a polarity discriminating device for discriminating the polarity of the output current detected by the current detector 6. The comparator circuit 11 outputs a signal to a polarity reversing circuit 13. This reversing circuit 13 also receives an input from a DC voltage sensor 12, which is used to detect the voltage level of the DC power supply 4.
An AC reference voltage generator circuit 8 is provided for generating a sinusoidal reference signal. An amplifier 9 amplifies the reference signal and outputs the resulting signal to a pulse-width modulator (PWM) circuit 10, which is composed of comparator circuit 10a and triangle-wave generator 10b used to generate a carrier wave for the pulse train output from the circuit 10. The output from the circuit 10 is used by drive circuit 7 to drive the main inverter circuit 1, as is well known in the art.
In operation, a sinusoidal wave output voltage is output to the load 5, as it appears across the terminals of the capacitor 3 in accordance with the control output of the PWM circuit 10. That is, the amplifier 9 and PWM circuit 10 operate to alternately switch the bridge-configured transistors in the inverter main circuit 1 so that the output of the main circuit 1, as filtered by the AC filter, matches the sinusoidal reference voltage generated by the AC reference voltage generator 8.
Ideally, the bridge-configured transistors operate to switch instantaneously when driven. However, in practice, the transistors experience some switching delay between ON and OFF states. Thus, the main circuit 1 is subject to a short-circuit condition that results when both the upper and lower arm transistors are in the ON state. This short-circuit condition may cause a current surge (overcurrent) to damage one or more of the transistors in the main circuit 1.
In order to prevent overcurrent damage, the control circuit must switch both transistor arms OFF for a certain period of time Tb to stop the inverter output voltage. The period of time Tb is known as the short-circuit prevention period. By switching the transistors of the main circuit 1 OFF during the short-circuit prevention period Tb, the inherent delay in switching between the drive signals shown in FIGS. 11(b) and 11(c), and the ideal PWM output signal shown in FIG. 11(a) will not cause overcurrent damage of the bridge-configured transistors of the main circuit 1.
Although the short-circuit prevention period Tb is successful in preventing overcurrent damage, the switching off of the main circuit transistors creates a difference between the actual inverter output voltage value and the ideal inverter voltage value. This difference in values is known as the voltage error .DELTA.V. Namely, when a current flows from the inverter to the load, the actual output voltage (FIG. 11(e)) is less than the ideal output voltage (FIG. 11(a)) due to the short-circuit prevention period Tb (the difference being shown as the hatched area in FIG. 11(e)). Conversely, when a current flows from the load to the inverter, the actual output voltage (FIG. 11(d)) is more than the ideal output voltage due to the short-circuit prevention period (as shown in the hatched area of FIG. 11(d)). In either case, an voltage error takes place, resulting in the actual voltage, as indicated by a long and short dashed line in FIG. 12, deviating from the ideal sine-wave voltage signal, shown as the short dashed line in FIG. 12.
The average voltage error is equivalent to a time-averaged difference between the area of the actual inverter output voltage waveform and that of the ideal inverter output voltage waveform. The average voltage error is also proportional to the DC power supply voltage. During the short-circuit prevention period Tb, the average voltage error is in phase with and opposite in polarity to the inverter output current (shown as the solid line in FIG. 12).
The control circuit of FIG. 10 compensates for the average voltage error amount appearing in the output voltage of the inverter main circuit 1 by first detecting the inverter output current using current detector 6 and discriminating the polarity of the output current using comparator circuit 11. Next, the control circuit detects the voltage level of the DC power supply 4 using the DC voltage sensor 12 and provides the level signal to the polarity reversing circuit 13. The reversing circuit 13 operates to reverse the polarity of the level signal output from the voltage sensor 12 whenever the comparator 11 outputs a signal indicating that the output current of the main circuit 1 has a negative polarity. In effect the comparator circuit 11 detects the polarity of the average voltage error because the output current is opposite in polarity to the average voltage error. By detecting the polarity of the average voltage error, the polarity reversing circuit 13 can output a level signal opposite in polarity to the average voltage error as an offset or compensation error signal. This compensation error signal is output to the PWM circuit 10 to automatically compensate for the average voltage error included in the actual inverter output voltage of the main circuit 1.
As stated above, the control circuit discriminates the polarity of the inverter output current by judging whether the direction of the output current is positive or negative with respect to a zero current. Because the current actually output by the inverter has ripples, as shown in FIG. 2B, chattering occurs in the vicinity of the zero current. Thus, the detection of the polarity cannot be accurately made. As a result, the control circuit cannot properly compensate for the average output voltage error using the construction described above. An additional problem with the known control circuit is that a mismatch between a period when the transistors of the main circuit are actually off and the ideal short-circuit prevention period Tb are caused by delays in the switching of the transistors due to increases or decreases in the current supplied from the main circuit 1 to the load 5.